- I am currently Pursuing my MTech in VLSI Design.
- Good understanding of CMOS concepts, Physical Design flow, STA.
- Sound knowledge of Digital Design Concepts.
- Hands-on Verilog HDL, VHDL, System Verilog, and C.
- Familiarity with Linux
- Hands-on experience of EDA Playground and Cadence virtuoso
- Hands-on experience with Spartan 3, Spartan 6 FPGA, and Zynq-7000 SOC
- Working experience on Xilinx ISE, Xilinx Viv ado tool, and Xilinx SDK.
- Hands-on experience with Serial communication protocol UART, I2C, and SPI.
- Qualified GATE 2022 with AIR 3475 (IN).
Don’t Stop Until You’re Proud– Amit Shohal
LATEST POSTS
TIME TABLE FOR GATE/UPSC 2022 EXAM DAY 7 (06 SEP (SAT))
In this blog , I am going to share my Day 6 Time Table for GATE Exam . It is a 12 Hour Study Plan (applicable for all). Total time…
TIME TABLE FOR GATE/UPSC EXAM DAY 6 (03 SEP (WED))
S.NO. TIME TASK/SUBJECT 1. 3:00 – 6:00 AM NETWORK ANALYSIS (CURRENT AND VOLTAGE DIVISION) + SHORT NOTES + MICRO NOTES 2. 6:00 – 9:00 AM…
Time Table for GATE/UPSC EXAM Day 5 (27 Aug (Fri))
In this blog , I am going to share my Day 5 Time Table for GATE Exam . It is a 12 Hour Study Plan (applicable for…
ABOUT - AMIT SHOHAL
I am currently pursuing MTech in the field of VLSI Design from Punjab Engineering College, Chandigarh. I have an experience of 1 and half years in the Automobile Industry.
I had cleared many Government Exams like JEE MAINS 2016, JEE ADVANCED 2016 (AIR 2048), HPCET 2016, HP UIIT 2016, etc.
I recently cleared the toughest exam in India – the Graduate Aptitude Test in Engineering (GATE 2021) with AIR 3475.